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1 /* |
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2 * Copyright (c) 2018-present, Facebook, Inc. |
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3 * All rights reserved. |
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4 * |
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5 * This source code is licensed under both the BSD-style license (found in the |
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6 * LICENSE file in the root directory of this source tree) and the GPLv2 (found |
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7 * in the COPYING file in the root directory of this source tree). |
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8 * You may select, at your option, one of the above-listed licenses. |
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9 */ |
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10 |
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11 #ifndef ZSTD_COMMON_CPU_H |
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12 #define ZSTD_COMMON_CPU_H |
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13 |
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14 /** |
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15 * Implementation taken from folly/CpuId.h |
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16 * https://github.com/facebook/folly/blob/master/folly/CpuId.h |
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17 */ |
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18 |
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19 #include <string.h> |
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20 |
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21 #include "mem.h" |
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22 |
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23 #ifdef _MSC_VER |
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24 #include <intrin.h> |
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25 #endif |
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26 |
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27 typedef struct { |
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28 U32 f1c; |
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29 U32 f1d; |
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30 U32 f7b; |
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31 U32 f7c; |
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32 } ZSTD_cpuid_t; |
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33 |
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34 MEM_STATIC ZSTD_cpuid_t ZSTD_cpuid(void) { |
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35 U32 f1c = 0; |
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36 U32 f1d = 0; |
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37 U32 f7b = 0; |
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38 U32 f7c = 0; |
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39 #ifdef _MSC_VER |
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40 int reg[4]; |
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41 __cpuid((int*)reg, 0); |
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42 { |
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43 int const n = reg[0]; |
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44 if (n >= 1) { |
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45 __cpuid((int*)reg, 1); |
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46 f1c = (U32)reg[2]; |
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47 f1d = (U32)reg[3]; |
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48 } |
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49 if (n >= 7) { |
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50 __cpuidex((int*)reg, 7, 0); |
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51 f7b = (U32)reg[1]; |
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52 f7c = (U32)reg[2]; |
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53 } |
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54 } |
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55 #elif defined(__i386__) && defined(__PIC__) && !defined(__clang__) && defined(__GNUC__) |
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56 /* The following block like the normal cpuid branch below, but gcc |
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57 * reserves ebx for use of its pic register so we must specially |
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58 * handle the save and restore to avoid clobbering the register |
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59 */ |
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60 U32 n; |
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61 __asm__( |
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62 "pushl %%ebx\n\t" |
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63 "cpuid\n\t" |
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64 "popl %%ebx\n\t" |
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65 : "=a"(n) |
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66 : "a"(0) |
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67 : "ecx", "edx"); |
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68 if (n >= 1) { |
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69 U32 f1a; |
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70 __asm__( |
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71 "pushl %%ebx\n\t" |
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72 "cpuid\n\t" |
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73 "popl %%ebx\n\t" |
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74 : "=a"(f1a), "=c"(f1c), "=d"(f1d) |
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75 : "a"(1) |
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76 :); |
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77 } |
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78 if (n >= 7) { |
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79 __asm__( |
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80 "pushl %%ebx\n\t" |
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81 "cpuid\n\t" |
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82 "movl %%ebx, %%eax\n\r" |
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83 "popl %%ebx" |
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84 : "=a"(f7b), "=c"(f7c) |
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85 : "a"(7), "c"(0) |
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86 : "edx"); |
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87 } |
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88 #elif defined(__x86_64__) || defined(_M_X64) || defined(__i386__) |
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89 U32 n; |
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90 __asm__("cpuid" : "=a"(n) : "a"(0) : "ebx", "ecx", "edx"); |
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91 if (n >= 1) { |
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92 U32 f1a; |
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93 __asm__("cpuid" : "=a"(f1a), "=c"(f1c), "=d"(f1d) : "a"(1) : "ebx"); |
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94 } |
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95 if (n >= 7) { |
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96 U32 f7a; |
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97 __asm__("cpuid" |
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98 : "=a"(f7a), "=b"(f7b), "=c"(f7c) |
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99 : "a"(7), "c"(0) |
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100 : "edx"); |
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101 } |
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102 #endif |
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103 { |
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104 ZSTD_cpuid_t cpuid; |
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105 cpuid.f1c = f1c; |
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106 cpuid.f1d = f1d; |
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107 cpuid.f7b = f7b; |
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108 cpuid.f7c = f7c; |
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109 return cpuid; |
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110 } |
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111 } |
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112 |
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113 #define X(name, r, bit) \ |
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114 MEM_STATIC int ZSTD_cpuid_##name(ZSTD_cpuid_t const cpuid) { \ |
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115 return ((cpuid.r) & (1U << bit)) != 0; \ |
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116 } |
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117 |
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118 /* cpuid(1): Processor Info and Feature Bits. */ |
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119 #define C(name, bit) X(name, f1c, bit) |
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120 C(sse3, 0) |
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121 C(pclmuldq, 1) |
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122 C(dtes64, 2) |
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123 C(monitor, 3) |
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124 C(dscpl, 4) |
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125 C(vmx, 5) |
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126 C(smx, 6) |
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127 C(eist, 7) |
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128 C(tm2, 8) |
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129 C(ssse3, 9) |
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130 C(cnxtid, 10) |
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131 C(fma, 12) |
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132 C(cx16, 13) |
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133 C(xtpr, 14) |
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134 C(pdcm, 15) |
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135 C(pcid, 17) |
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136 C(dca, 18) |
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137 C(sse41, 19) |
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138 C(sse42, 20) |
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139 C(x2apic, 21) |
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140 C(movbe, 22) |
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141 C(popcnt, 23) |
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142 C(tscdeadline, 24) |
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143 C(aes, 25) |
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144 C(xsave, 26) |
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145 C(osxsave, 27) |
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146 C(avx, 28) |
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147 C(f16c, 29) |
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148 C(rdrand, 30) |
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149 #undef C |
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150 #define D(name, bit) X(name, f1d, bit) |
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151 D(fpu, 0) |
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152 D(vme, 1) |
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153 D(de, 2) |
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154 D(pse, 3) |
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155 D(tsc, 4) |
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156 D(msr, 5) |
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157 D(pae, 6) |
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158 D(mce, 7) |
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159 D(cx8, 8) |
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160 D(apic, 9) |
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161 D(sep, 11) |
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162 D(mtrr, 12) |
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163 D(pge, 13) |
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164 D(mca, 14) |
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165 D(cmov, 15) |
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166 D(pat, 16) |
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167 D(pse36, 17) |
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168 D(psn, 18) |
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169 D(clfsh, 19) |
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170 D(ds, 21) |
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171 D(acpi, 22) |
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172 D(mmx, 23) |
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173 D(fxsr, 24) |
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174 D(sse, 25) |
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175 D(sse2, 26) |
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176 D(ss, 27) |
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177 D(htt, 28) |
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178 D(tm, 29) |
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179 D(pbe, 31) |
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180 #undef D |
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181 |
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182 /* cpuid(7): Extended Features. */ |
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183 #define B(name, bit) X(name, f7b, bit) |
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184 B(bmi1, 3) |
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185 B(hle, 4) |
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186 B(avx2, 5) |
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187 B(smep, 7) |
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188 B(bmi2, 8) |
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189 B(erms, 9) |
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190 B(invpcid, 10) |
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191 B(rtm, 11) |
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192 B(mpx, 14) |
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193 B(avx512f, 16) |
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194 B(avx512dq, 17) |
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195 B(rdseed, 18) |
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196 B(adx, 19) |
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197 B(smap, 20) |
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198 B(avx512ifma, 21) |
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199 B(pcommit, 22) |
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200 B(clflushopt, 23) |
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201 B(clwb, 24) |
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202 B(avx512pf, 26) |
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203 B(avx512er, 27) |
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204 B(avx512cd, 28) |
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205 B(sha, 29) |
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206 B(avx512bw, 30) |
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207 B(avx512vl, 31) |
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208 #undef B |
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209 #define C(name, bit) X(name, f7c, bit) |
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210 C(prefetchwt1, 0) |
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211 C(avx512vbmi, 1) |
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212 #undef C |
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213 |
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214 #undef X |
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215 |
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216 #endif /* ZSTD_COMMON_CPU_H */ |